As a member of our SI team you will be involved in developing multi gigahertz IO. You must be familiar with S parameters, package types and modeling techniques. You must be familiar with pre emphasis, de emphasis, DFE and CDR techniques.
Required Eduction: BE or equivalent Degree
Job experience required: 10-15 years
At Firenza, we specialize in designing high performance VLSI chips with heardquarters in Silicon Valley, California. Please forward your resume to "jobs@firenza-llc.com"