iCHAR is a cell level characterizer that automatically generates the timing view for cell libraries and individual cells. The inbuilt quality checker and analyzer ensures that the resulting timing views are robust with no off chart characterization points.

Features

Timing views : iCHAR delivers the cell timing views in all the industry standard formats that will plug into iTIME as well as any other industry standard flow for timing. ICHAR generates timing views for all of the cell based flows like Setup time, Hold time, Power corners etc.

Power views : Cell power views are imperative for chip level power estimation and power delivery. ICHAR provides the leaf cell level power views in industry standard format that will easily plug into any flow.

Leakage Views : As technologies get smaller and smaller leakage is getting bigger. Using the leakage views of cells generated by iCHAR, you can plug it into any existing flow for leakage estimation and system integrity.

Characterization criteria : iCHAR supports all of the industry standard characterization criteria. Some which are

• Delay degradation
• Slew rate degradation
• Glitch percentage
• Minimum D_to_Q.
• Rate of delay degradation
• Rate of slew rate degradation
• Rate of Minimum_d_to_Q

Characterization Methods : iCHAR can either use inbuild optimization features in SPICE like simulators OR proprietary optimizers (recommended) to to reduce characterization time.

Inbuilt Quality check : iCHAR has an inbuilt quality checker that tells the user of the quality of the generated matrices and trends in the characterization. The grpahical results are viewable using iVIEW.

Automatic functionality deduction : The user need not know the functionality of the cell while characterizing. ICHar can automatically decipher the functionality of each cell given either the netlist OR verilog. The arcs are automatically deduced and characterized. This is especially handy when dealing with external IP.

Special cell characterization : iCHAR supports the characterization of special cells esp in the memory domain for the user.

• Dynamic logic.
• SRAM bitcells.
• Sense amplifiers.
• CAM cells.
• Multiport register file bitcells
• Low swing circuits

Batch mode library characterization : Library characterization is made simple with the use of batch mode processing. Once the flow is setup, iCHAR can be run using batch mode processing. With iFLOW, the validity of the results of each cell can be viewed.

GULT language support : GULT language programming is supported to facilitate extreme customization of the tool. Using this language the user can customize iCHAR to run on any cell using any user defined criterion.

Networked parallel computing : iChar fully takes advantage of the present day networking and parallel computing technologies and self balances the characterization amongst the available servers. This ensures that the computing resource as a bottle neck is avoided.

Compatible simulators : iCHAR support the following simulators in a native form Hspice, Smartspice, Ultrasim, Eldo, Spectre. The simulation environment configurator, however, lets you configure iCHAR to any other simulator.